TDRE=0, TIE=0, TMODE=0000, TF=0
Timer Control Status Register
TDRE | Timer DMA Request Enable 0 (0): DMA request is disabled 1 (1): DMA request is enabled |
TMODE | Timer Mode 0 (0000): Timer Channel is disabled. 1 (0001): Timer Channel is configured for Input Capture on rising edge 2 (0010): Timer Channel is configured for Input Capture on falling edge 3 (0011): Timer Channel is configured for Input Capture on both edges 4 (0100): Timer Channel is configured for Output Compare - software only 5 (0101): Timer Channel is configured for Output Compare - toggle output on compare 6 (0110): Timer Channel is configured for Output Compare - clear output on compare 7 (0111): Timer Channel is configured for Output Compare - set output on compare 9 (10x1): Timer Channel is configured for Output Compare - set output on compare, clear output on overflow 10 (1010): Timer Channel is configured for Output Compare - clear output on compare, set output on overflow 14 (1110): Timer Channel is configured for Output Compare - pulse output low on compare for one 1588 clock cycle 15 (1111): Timer Channel is configured for Output Compare - pulse output high on compare for one 1588 clock cycle |
TIE | Timer Interrupt Enable 0 (0): Interrupt is disabled 1 (1): Interrupt is enabled |
TF | Timer Flag 0 (0): Input Capture or Output Compare has not occurred 1 (1): Input Capture or Output Compare has occurred |